One of Europe’s leading microelectronics manufacturing, packaging and testing companies
2 July 2020

GS Nanotech’s experts speak about designing and manufacturing system in a package

GS Nanotech (part of GS Group) is now a partner of the “Systems-in-a-Package: Design and Production” conference. The Centre for Modern Electronics and the Electronics Developers and Manufacturers Association were the organisers of the conference. The event was held on 25 June 2020 in an online format on the Centre platform.

This was the second time the conference had been held. Last year it went ahead in an online format, whereas this time the speakers presented their reports using Zoom. Participants included producers of microchips and systems-on-chips, electronic equipment developers, technologists and heads of production, and suppliers of technological equipment, CAD software, and production services.

System-in-package technology is the combination of several active and passive electronic components in one module. This means that one microchip assembled using SiP technology can complete several tasks at the same time, rather than using a whole system of separate components.

GS Nanotech has been developing and manufacturing SiP to meet its clients’ requirements, and mass producing its own commercial microprocessors using this technology - SiP Amber S2, SiP Emerald, and others.

At the conference, GS Nanotech’s experts shared their experience and discussed the different stages of development, production, and testing of SiP.

The head of the department and promotion at GS Nanotech, Sergey Belyakov, introduced listeners to the production sited at the Technopolis innovation cluster in Kaliningrad Oblast. The expert described how the enterprise is actively promoting its SiP development and production services on the export market: “We are using SiP technology to integrate several chips onto a single board to miniaturise the product and reduce the cost of the end product. For the moment, the SiP market in Russia is small; however, we have noticed a trend towards rapid growth in SiP on both global and domestic markets. We may be able to replace some imported goods with our own solutions.”

The head of GS Nanotech’s design and research division, Mikhail Chuvstvin, shared some practical case studies of designing and developing SiP. Specifically, he gave a brief overview of some developed products and looked at typical mistakes and how to avoid them. He noted that, “Certain devices require miniature modules and all the necessary components need to fit onto a single microcircuit; for example, immediate access storage, the processor, a flash drive, and the passive part. We are successfully resolving these issues.”

GS Nanotech’s leading engineering designer of multi-chip modules Maxim Savitsky compared SiP with other microcircuit production technologies. He highlighted the economic and technological advantages of using SiP: reduced development times, simplified assembly of components, greater reliability, and lower end-product cost.

GS Nanotech’s leading testing engineer Alexey Bolebrukh spoke about the different aspects of testing SiP during serial production and about the company’s experience of developing complex testing solutions.
GS Nanotech’s head production engineer Konstantin Belov presented the main stages of creating SiP. He went into detail about each technological process and demonstrated how SiP goes from prototype to mass production.

Representatives of other companies also presented reports at the conference.

Head representative of JTAG Technologies Alexey Ivanov spoke about the situation in Russia with regards to boundary-scan standards and integral SiP testing.

A report on internal and flip-chip attachment of unpackaged microchips to create highly integrated micro-assemblies was presented by Denis Vertyanov, head of the scientific training centre of the Institute of Nano and Microsystem Technology, MIET.

Kirill Nikeyev, leading technical consultant for PCB and mentor at Siemens Business, shared information about managing the effects of heat and stress on SiP. Head production engineer at GS Nanotech Konstantin Belov found this report particularly interesting. He said that, “The issues touched on in this presentation are topical and should be addressed in our own production.”

The representative of Petrozavodsk State University, Pavel Lunkov, spoke about a new method, unique in Russia, for assembling integral circuits: PoP (Package-on-Package) technology. This hybrid technology for producing multi-chip microcircuits using flip-chip and wire bond attachment makes it possible to combine chips from different suppliers in one product to build a module with diverse functionality.
Several other reports were dedicated to the advantages and disadvantages of cooperation with foreign companies, technological analysis, testing, and various aspects of using software in SiP production.
“At this conference, we were able to assess the progress of Russian developers, share experience, discuss the future of the industry, and receive answers from the experts to interesting questions,” noted participants of the event.